Resume of Chris Nadovich
1302 Diamond Street, Sellersville, PA 18960 USA
- Email
- (click to send email)
- Voice Phone
- +1 215 257 8708
For latest resume, browse
http://www.nadovich.com/chris/resume.html
Chris Nadovich is a systems designer, developer, and project engineer
with diverse experience. He works as an independent consultant to
undertake various multidisciplinary engineering
efforts with an emphasis on RF, Analog, and Digital signal processing.
Nadovich's areas of expertise are:
Skill-Set Key Words
3D A/D APL ATE ATML Adaptive Adaptive-Array Analog
Analyzer Antenna Apache Aperture Assembler AUT Board Beamformer BER
BSD Broadband Butterworth C C++ CAD Capacitor CASS Cellular Chirp
Circuit Clearance CLR Chebyshev Commercial Compact-Range Control
Convolution D/A DAC Design Delay DF Dipole DNS DSP Digital ECCM ECM
EMC Embedded EMI Feed FET FCC FIR Filter FORTH Fourier FPGA Firmware
Gaussian GCC GPS 68HC11 High-Power HFSS HTML HF Horn IIR ISAR ISP
Impedance Internet Inductor Instrument Integral
ISM IVI JPEG Lab LabView LabWindows
Laplace Laser Linux Measurement Microstrip MIMO MPEG MUSIC Mathematica
Matching Matlab Metrology Microwave Millimeter-Wave Microcontroller
Military Monopulse MySQL Network Neuron NTSC Numerical Op-Amp PC104
PAL PCB PHP Part-15 Perl Positioner Phase Phased-Array Pulse PWB RF
Radar RCS Resistor Reactance Reflection Reflector SAR Scalar Sensor
Smart-Antenna Software Spread-Spectrum Stripline Surface-Mount
Super-Resolution Synthesizer Synthetic Systems TCP/IP Test
TeX TMS-320 Theodolite TR-Module UART UHF VHF Verilog Velodrome Video
VHDL Verilog VSWR WLAN Wi-Fi Waveguide X-band Xilinx Yagi XML Z-World
Z80 2G 3G 8051 6805
BIOGRAPHY
Nadovich received BSEE and MEEE degrees from Rensselaer Polytechnic
Institute in 1981 with specialty in network theory and numerical
analysis.
After graduation, he worked in industry, serving as lead engineer
guiding ground-up development of a number of sophisticated signal
processing systems, including SuperResolution Direction Finding systems,
Microwave and RF Measurement systems, and specialized Monopulse and SAR
radars. This work gave him extensive experience in both hardware and
software, including RF/Analog design, test, and measurement from DC to
94 GHz, and real time DSP using high performance digital systems and
embedded software.
While working in industry as an engineer, Nadovich was also a
competitive bicycle racer. In 1994, Nadovich, united his skills as an
engineer with his love for bicycle racing when in he designed the
velodrome for the 1996 Olympic Games. The 250 meter track has 42
degree banking in the curves and a proprietary shape designed by
Nadovich using a hybrid symbolic/numerical model implemented in
Mathematica and based on the theory of the Fresnel integral. The
track was temporarily installed at the Stone Mountain Cycling and
Archery Venue near Atlanta Georgia for use in the 1996 Olympic
games. To date, Nadovich has been the designer of 7 velodromes
worldwide.
Since then Nadovich has continued his work in RF and Microwave
engineering as an independent consultant, along with several Internet
related projects for the ISP he owns, JTAN.COM. He has written a book: Synthetic Instruments,
Concepts and Applications published by Elsevier in
2004.
These days, Nadovich is Director of Laboratories at Lafayette College in Easton, PA.
RF, ANALOG, AND MICROWAVE SYSTEMS
Graco, Exton, PA, 2005
Consulted on FCC Part 15
Certification issues for an intentional-radiator product.
Orbit/FR, Horsham, PA, 2005
Project Engineer coordinating the installation of new Compact Range
equipment, including a multi-band scalar feed carousel, and a
multi-segment machined aluminum reflector. Work included survey,
installation, laser alignment, and RF field probing the final system.
Schulmerich Bells, Sellersville, PA, 2004
Consulted on FCC Part 15, IC, and EC
Certification issues for intentional-radiator products.
Designed various antennas for hand held wireless products.
Access Research, St Louis, MO, 2003
Designed a propagation channel simulator matrix for automated testing of
multiple RF communications devices.
Lambda Sciences, Villanova, PA, 2002
Designed an L-band multi-channel phase tracking radar receiver.
KVH Industries, Middletown, RI, 2001
Designed a low cost X-band LNA for a commercial phased array
application.
Lambda Sciences, Villanova, PA, 2001
Designed a 6 channel X-band receiver for a switched SAR/Chirp
instrumentation radar.
Aeroflex-Lintek, Powell, OH, 2000
Designed numerous RF upconverter and downconverter circuits in
microstrip as part of an overall redesign of an RF instrumentation
system.
Invented and refined a new stimulus architecture for RF Test.
Participated in the development of a hardware demonstration for this new
Stimulus system.
UNDISCLOSED 1999
Client Details on Request
Evaluated the feasibility of a ground-to-ground short range target
tracking system. Developed a prototype system and used that system to
measure actual propagation and blockage diffraction effects from UHF to
X band.
AEROFLEX LINTEK, Powell, OH, 1997 - 1998
Consulting systems engineer in support of a successful effort to develop
and market a next-generation automated test instrument. Was a key
software and hardware architect of this system and participated in
numerous technical and marketing decisions based on extensive
conversations with customers and in collaboration with sales and
engineering personnel.
FLAM & RUSSELL, INC, Horsham, PA, 1984 - 1996
R&D Engineer in charge of custom hardware development. Developed a
W-Band (94 GHz) radar transceiver for a Compact RCS range, and a 68HC11
based control system for UHF high power amplifiers.
Lead engineer that guided the development of a transportable X-band
SAR imaging system
and a transportable
X-band, monopulse instrumentation radar.
Was responsible for coordinating the RF, video, digital,
mechanical, and software efforts required to build these radars. And
was the primary author of the winning proposals that resulted in this $4+
million dollars of business.
In other programs, he served as systems engineer for a pair of 10 kW UHF
helix arrays, positioners, tower, and concrete foundation delivered to
NASA for use as a command antenna system. He designed and supervised
the construction of the RF hardware for a three-element adaptive antenna
array, with custom circuitry including a four-channel, phase coherent
receiver system and a broadband, adaptive, analog beamformer. He
participated in experiments to investigate the feasibility of MOM or PN
junction millimeter wave and infrared mixers. And he made significant
contributions to the development of the RCS imaging software sold by
Flam & Russell, particularly in the area of image RCS calibration and
time domain processing.
ULTRAFAST CORPORATION, Malvern, PA, 1995
Analog design consultant supporting the introduction of a new,
enhanced version of an ultrasound system for measuring the torque
applied to fasteners. Consulted on transceiver design and the design of
matching networks.
FAIRCHILD WESTON, Sarasota, FL, 1986 to 1987
Developed a UHF telemetry data link for use in a remotely piloted
vehicle to downlink digitized surveillance video. Work involved
design of microstrip and stripline circuitry, including an agile
varactor preselector, and custom analog and digital components.
GENERAL ELECTRIC, Utica, NY, 1985 to 1986
Performed trade-off study exploring alternative T/R circuit
architectures in a 2-18 GHz active phased array antenna used for
airborne RADAR. The T/R circuits were microwave hybrids containing
several Gallium Arsinide MMIC's.
ZEGER-ABRAMS, Glenside, PA, 1981 to 1983
Participated in the development, construction, and delivery of
interference cancellation hardware to demonstrate the feasibility of
HF SIMOP (simultaneous operation) on the P3-C aircraft. The delivered
hardware included a high power Adaptive Interference Canceler, an
interference insensitive ALC circuit for a 1 KW HF transmitter, and a
synchronous discriminator for an automatic antenna coupler.
Contributed to the design and development of a high speed, low
distortion, low noise, high power, broadband complex-weight for use in
adaptive systems.
Synthesized and mathematically analyzed candidate system designs for
adaptive antenna array processors that incorporate time, frequency, or
code multiplexing. Compatibility with other ECCM techniques such as
spread spectrum modulation was investigated. Wrote technical reports
describing important results and promising systems.
DSP AND SOFTWARE ENGINEERING EXPERIENCE
DIGITAL VIDEO ARTS LTD, Dresher, PA, 1995 to 1996
Developed microcode to perform Wavelet based data compression algorithms
on NTSC/PAL video using the
VCP
a high performance SIMD architecture
computing element.
CHECKPOINT SYSTEMS, Thorofare, NJ, 1995
Hardware/Software consultant supporting the introduction of a new,
cost-reduced version of an electronic security product built with
several TMS-320, Neuron, and 80188 microprocessors, various
FPGA's and PLD's, and analog/RF circuitry. As part of his work,
Nadovich wrote code for each of the embedded processors, including a
portable FORTH compiler written in C that was used as a diagnostic
scripting facility.
FLAM & RUSSELL, INC, Horsham, PA, 1984 - 1996
Designed a
twelve-channel, hybrid analog/digital receiver system
for use in super- resolution DF. Each of the twelve, precisely matched
receiver channels consisted of custom RF/analog downconversion
circuitry followed by real-time digital signal processing implemented
in four TMS-320 microprocessors. Designed both the RF and digital
hardware and the real-time firmware.
Wrote software implementations of the super-resolution direction
finding algorithms Maximum Likelihood and MUSIC for use with the above
receiver system. Integrated the DF software into a general antenna
array simulator, permitting testing of the algorithm with arrays of
arbitrarily located loops and dipoles illuminated by a generalized
signal environment.
MECHANICAL DESIGN EXPERIENCE
EDS SUPERDROME, Frisco, TX, 1997 to 1998
Design engineer for another velodrome
built using the same innovative techniques applied in Atlanta. In
this track, Nadovich improved the concept developed in Atlanta with
several key refinements. The 250 meter EDS Superdrome was assembled in
only 7 days. It now is being used by the US national team for training
and competition.
OLYMPIC VELODROME, Atlanta GA, 1994 to 1996
Co-authored a winning technical proposal for the construction of a 250 meter
velodrome for the 1996 Olympics.
The track has 42 degree banking in the curves and a proprietary shape
designed by Nadovich using a hybrid symbolic/numerical model
implemented in Mathematica and AutoCAD and based on the theory of the
Fresnel integral. Comprising over 75 tons of structural steel
framework, the track was fabricated on a tight schedule at C.H. Landis
Company (Souderton, PA) under Nadovich's
supervision. It was temporarily
installed at the Stone Mountain Cycling and
Archery Venue near Atlanta Georgia for use in the 1996 Olympic games.
NETWORK AND SYSTEM ADMINISTRATION EXPERIENCE
JTAN, Sellersville, PA, 1991 to present
Owns and manages an Internet presence provider business JTAN with customers worldwide.
LINEX COMMUNICATION, San Francisco, CA, 1995 to 2000
Administrative consultant for a large an ISP in the San
Francisco Bay area. Assists in optimizing daily operation, upgrades, and
maintenance of the Web server and email system.
Also provided a comprehensive, multi-client, WWW server access
statistical analysis package
(http://www.jtan.com/stats)
written in perl and C that is currently in
use by this and other ISPs.
LITTON AMECOM, College Park, MD, 1983 to 1984
Contributed to the proposal of a high capacity, frequency multiplexed,
Local Area Network. Participated in an architecture trade-off study
that contrasted TDM and FDM technologies.
EDUCATION
RENSSELAER POLYTECHNIC INSTITUTE
Completed Master's Degree (7/81) with specialty in network theory and
numerical analysis. Thesis work, an efficient algorithm for the
solution of partial differential equations, required extensive
programming in APL and FORTRAN, along with detailed mathematical
analysis. Another advanced project was the design of a bit-slice
processor for high speed numerical convolution. Was Research
Assistant; was supported by IBM.